Techniques for low-cost spectrum analysis on quadrature demodulation architectures

The Decimator, an SED Systems Ltd. product, is a PCI slot card that performs both time and frequency domain measurements of given input signals. It is essentially a more economical version of a bench spectrum analyzer or oscilloscope, with a PC interface. Several issues limit the speed and accuracy of the results of the Decimator, and the study of these issues is the focus of this thesis. These issues, including but not limited to, are as follows: 1) Imbalances between the received In-phase and Quadrature-phase channels; 2) The FFT and Windowing functions are performed by a microcontroller, but it is desired that they be migrated to an FPGA. While solutions to improve the first issue is being implemented and verified, the second issue is not one of simply reducing a source of error. The second issue requires a cost-benefit analysis on the migration of these signal processing algorithms from an ARM microcontroller to a Xilinx FPGA